A cache-friendly IPv6 LPM with AVX-512 (linearized B+-tree, real BGP benchmarks)
Article URL: https://github.com/esutcu/planb-lpm Comments URL: https://news.ycombinator.com/item?id=47830071 Points: 10 # Comments: 2
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I ported Microsoft's TRELLIS.2 (4B parameter image-to-3D model) to run on Apple Silicon via PyTorch MPS. The original requires CUDA with flash_attn, nvdiffrast, and custom sparse convolution kernels: none of which work on Mac.I replaced the CUDA-specific ops with pure-PyTorch alternatives: a gathe...
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